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Low Noise Amplifier plays an important role in radio receivers. It mainly determines the system noise and intermodulation behavior of overall receiver. LNA design is more challenging as it requires high gain, low noise figure, good input and output matching and unconditional stability. Further, designing a Low noise Amplifier requires active device selection, amplifier topology, optimization algorithms for superlative results. Hence this paper presents comparative analysis of CMOS LNA based on different topologies and optimization algorithms for 180nm RF CMOS design.
Here the best results, various limitations in each topology are reviewed and requires specifications are determined in each designing.
Keywords— Low Noise Amplifier (LNA), CMOS, Radio frequency (RF), Noise Figure, Gain, Stability, Topologies.
In recent modernized technologies mobile cellular, WLANs rules the entire universe. The sensitivity of any receiver circuit is very critical as they are designed using RF components like antennas, filter circuits, low noise amplifier, mixers and converters. In radio receiver the Low Noise Amplifier (LNA) designing is a challenging aspect as its design is very critical with high density integration.
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In general an amplifier increases both signal and noise at its input. The noise obtained from outside signal gets added with the inbuilt noise of the amplifier.
This SNR value degrades the performance of amplifier in the receiver circuit. In general the noise from the transmitted signal cannot be minimized effectively but the noise which is inbuilt in the device can be turn down. Hence an amplifier circuit (LNA) is designed to provide low noise.
LNA is an electronic amplifier that amplifies very low power signal with significantly not degrading the SNR ratio. The basic requirements of LNA are to minimize the noise coming from the device, provide high Linearity, very low power consumption, high Gain and matching. Low noise amplifiers are used in various applications such as ISM radios, cellular and PCS handsets, WLANs, GPS receivers, cordless phones and automotive remote keyless entry devices. They are also found in satellite communication systems, where the ground station receiving antenna will connect to a low noise amplifier.
The amplifier boosts the antenna signal in order to compensate for the feed line losses going from the antenna to the receiver. Here the Low Noise Amplifier (LNA) design is reviewed based on various topologies for 180nm RF CMOS technology. This survey is mainly done to determine which techniques would be useful for designing LNA that could be used in space applications. The outline of this paper is organized as follows. Section II provides LNA specifications such as active device simulation, LNA parameters and different topologies. Section III discusses about the literature survey based on different topologies and different optimization algorithms. Finally section IV presents the conclusion.
Device performance and its limitations, amplifier topologies, CAD design tools, Environmental impacts and testing techniques are the main aspects to be considered in order to design a perfect amplifier circuit. Here LNA specifications are mainly targeted on different topologies, LNA parameters and the active device simulation. Basically LNAs are designed using various techniques such as single ended, resistive termination, Differential, Balanced, Cascode topology, feedback topology, and gm boosted topologies. LNA parameters to be calculated are Gain, Noise figure, input and output reflection coefficient, Linearity, Stability factor, reverse isolation factor and power consumption. The third important specification is the active device selection where generally CMOS, SiGe HBT, GaAs/InP HBT, MESFET, HEMT devices are considered.
It is very essential to study the existing techniques proposed by various researchers in respective fields. A literature review is done on LNA designing using different topologies and optimization algorithms to design a perfect 180nm RF CMOS LNA. Review is carried out by considering various research works on 180nm technology and tabulation is provided with the LNA parameters determined in each designing. The following literature review discusses all the different techniques. Survey based on TopologiesSingle-stage cascode low noise amplifier (LNA) is proposed in for S-band frequency specifically for cryogenic applications. In this paper, the LNA design has been realized with UMC 180 nm technology considering cryogenic environment conditions. This LNA achieves 15. 8 dB gain, +2 dBm IIP3, and 1. 6 dB noise figure (NF) at 2. 075 GHz drawing 7. 66 mA current from a 1. 8 V supply. Comparison between basic cascode and modified cascode topology as shown in figure 1(a) and 1(b) are proposed in. Basic cascode topology provides high performances due to the common source stage in it, but it reduces the noise figure parameter in LNA. Hence a modified cascode topology is designed in this paper by adding additional transistor to the common source stage. This modified cascode LNA provides 10% high gain and low NF than basic cascode design. It provides 19. 2 dB gain and 0. 416 db NF at 2. 4 GHz.
Basic Cascode topology, (b) Modified Cascode topology, (c) Cascode common source topology. A CS-CS Current reuse LNA [4], [7] is proposed. This proposed work involves the design of LNA with common source topology with current reuse technique as shown in fig 2. Here in order to achieve lower power consumption and high gain, the current-reuse structure is used. This technique is carried out using cascaded LNA where the second stage reuses the bias current of the first stage to save power. [
Narrowband Differential LNA is proposes which provides high gain and better noise performance when compared with CS stage inductive degeneration topology. In general inductive source degeneration topology as shown in fig 3 is mainly considered as it provides proper matching and higher gain and lowest Noise Figure when compared with other topologies. But it provides it showa certain failures which is overcomed by Differential amplifier. Reduction in input noise contribution is the most explicit property of differential operation. This method rejects the common mode noise components and it is very less sensitive to the gate induced current noise.
A Low Noise Amplifier working at 2. 4 GHz using 180nm PTM technology is proposed where an comparison between common source stage with inductive load and cascode stage LNA with inductive load is performed. Here cascode with current mirror architecture is adapted because it exhibits high gain and provides large bandwidth by reducing bias voltages to the MOSFET transsitors. Design of two different LNA’s is proposed for WiMax applications. Cascoded common source amplifier and shunt feedback topology as shown in fig 4 is adapted in this paper. One type of amplifier is proposed using cascode topology which is mainly used as it provides higher gain due to its increase in output impedance. Second type LNA is designed using shunt feedback topology which has various benefits like it provides very high linearity and it could be a great choice in wide band application. But shunt feedback topology is not considered when compared with cascode topology because it provides higher noise figure.
Low Noise Amplifier for WLAN front end applications using enhancement mode technology has been proposed. This design adopts feedback and balanced topology. Feedback topology is mainly used to overcome input matching network problem as it cannot achieve low VSWR and low noise figure simultaneously. Hence feedback techniques solves this problems by inserting small value of inductor to the ground. Balanced topology as shown in fig 5 is adopted to provide better stability and meet failures in return loss specifications due to large mismatch on the input and output.
An Inductorless wideband LNA for software defined radio is presented. Shunt–shunt LNA with active feedback technique is adopted for first stage and common source amplifier as digitally tunable variable gain reconfigurable second stage. This proposed circuit provides better bandwidth and high gain performance. Variable gain cannot be implemented in feedback amplifier without affecting its input matching. Hence digitally tunable second stage is mainly adapted to provide variable gain to maintain linearity in the design. A novel dual band concurrent fully integrated LNA with current reuse topology is proposed. Concurrent LNAs are provided as they achieve narrowband gain and matching at multiple frequencies. The current reuse topology adopted here has two stage cascade amplifier where the first stage is CS amplifier and cascode amplifier as the second stage which eliminates the miller effect and provides a better isolation from output signal. Survey based on AlgorithmsThis literature survey is carried out on the designs where different optimization algorithms are implemented. Various algorithms like particle swarm optimization, noise cancellation technique, geometric programming (GP) method and NSGA-II algrithms are been reviewed. Fabrication of inductorless LNA with Noise Cancellation technique is proposed.
In this proposal a cascode topology is used where Common source amplifier is followed by Common gate amplifier. CS stage is mainly used as it provides higher gain and CG path is adopted for better input impedance matching. Here this CG path contributes enough noise in the circuit, thus noise cancellation technique is used to reduce noise contributed by CG path.
Low Noise Amplifier design with Inductive source degeneration topology with Particle swarm optimization technique is proposed. This technique is an iteration process where multiple candidate solutions will be taken and each will be considered as a separate particle. Each particle has its own position and velocity, thus at each iteration the particle updates its position and velocity. This LNA design provides a gain of 32 dB with 0. 52 Noise Figure.
A Convex optimization approach is proposed for designing LNA in deep submicron CMOS process. CS with inductive source degeneration topology is employed with convex optimization method (a form of geometric programming). This optimization method is employed to reduce the noise figure in the design. It mainly concentrates on the short channel effects such as excess thermal noise and this optimization procedure will perform optimal selection of device parameters.
A design and optimization of LNA for wireless applications is proposed where Elitist Non- Dominated Sorting Genetic Algorithm [NSGA-II] is been used to determine various values of components in the design. This optimization genetic algorithm is used over single ended LNA where it provides different parameters like isolation probability, population size, crossover probability and number of generations.
Narrowband LNA in 180nm CMOS technology using Simulated Annealing algorithm with cross over operator is proposed. This method uses simulated annealing algorithm which reduces local minimums by saving promising solutions of each design.
Low Noise Amplifier (LNA) is reviewed based on different topologies, its performance and limitations. Analysis based on Cascode topology, current reuse technique, Cascode inductive source degeneration topology, feedback technique and balanced technique is performed. This survey mainly focuses on 180nm CMOS technology and performance of each topology for this technology is elaborated. Various optimization algorithms for better results are also been reviewed. Hence concluding Cascode inductive source degeneration topology is more effective to provide higher Gain, lowest Noise Figure and best matching results for this technology.
Comparative Analysis Of LNA Based On Different Topologies And Algorithms. (2024, Feb 25). Retrieved from https://studymoose.com/comparative-analysis-of-lna-based-on-different-topologies-and-algorithms-essay
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