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HAL, Inc. is a major manufacturer of computers and computer components Essay

HAL, Inc. is a major manufacturer of computers and computer components. In one of their plants they made printed circuit boards (PCB’s), which were used by other plants in the company in a variety of computer products.

The basic process runs 3 shifts per day and it can be briefly depicted by following flow diagram

Optical Test-internal
Pro-Coat
Copper plate
Drilling
Optical Test- external

End of line test
Sizing
Machining
Lamination core
Treater procMess
Internal circuitize

Lamination composite

External circuitize

The targeted output for the plant is 3000 boards per day, five days a week, with plant running three shifts per day. But the plant has been failed to reach and maintain the targeted throughput at a steady rate due to manufacturing complexities associated with the product mix. It was also found that, the output of the pro-coat process is very slow (1200 boards/day) compared to the expected throughput and therefore Hal has to engage a vendor on the pro- coat process to fulfil the demand. This engagement of vendor has caused increase in cost per board and two days delay because of shipping up and back. So the Hal is striving to increase the throughput of the pro-coat process and the purpose of this case study is to provide some guidance to them in their effort by giving some
recommendations to improve the existing system.

Floor arrangement and the work flow of the pro-coat process

Daily demand = 3000 boards
Working hours = 24- (Breaks + Lunch + shift change + Meeting)
= 24-(20X2X3+40X3+10X3+90/5)
= 19.2 hrs
Demand= 3000/(19.2X60)
= 2.604 boards/min

Assumption;
1. Demand = Arrival rate (ra=2.604 boards/min)
2. Arrival pattern exponentially distributed (Ca2=1)
Machine Name| Mean process (load) time (min)| Std. Dev. Process Time (min)| Trip Time (conveyor) (min)| MTBF (hr)| MTTR (hr)| Setup time (min)| Availability| Number of machines| Rate per day| Clean| 0.33| 0| 15| 80| 4| 0| 0.95238| 1| 3325|

Coat 1| 0.33| 0| 15| 80| 4| 0| 0.95238| 1| 3325|
Coat 2| 0.33| 0| 15| 80| 4| 0| 0.95238| 1| 3325|
Expose| 103| 67| 0| 300| 10| 15| 0.96774| 5| 2834| Develop| 0.33| 0| 2.67| 300| 3| 0| 0.99010| 1| 3456| Inspect| 0.5| 0.5| 0| 0| 0| 0| 1.00000| 2| 4608|
Bake| 0.33| 0| 100| 300| 3| 0| 0.99010| 1| 3456|
MI| 161| 64| 0| 0| 0| 0| 1.00000| 8| 3435|
Touchup| 9| 0| 0| 0| 0| 0| 1.00000| 1| 7680|

Once analysed the Hal pro coat process, the expose work station (highlighted in above table) has been found as bottle neck operation under the 19.2 working hour situation. But the company goal is to achieve 3000 boards per day. If the company operate under the optimum condition, 2,834 boards could be produces, which is still below the company goal. According to the given data in the case was deeply analysed as follow. Assumption:

Inspection and MI are manual operations. So number of work benchers has been considered as 8 in MI operation and 2 in inspection work station. It could be possible to eliminate the bottleneck situation by adding resource (No of operators).

1. Cleaning
Effective processing time (te) = t0A
= 0.33/0.95238
= 0.3465 min
Utilization (u) = rax te
= 2.604 X 0.3465
= 0.902
Ce2= C02+1+Cr2A(1-A)mrt0
Ce2= o+1+00.95238(1-0.95238)2400.33
= 32.98
Departure rate; Cd2=u2Ce2+(1-u2)Ca2
= 0.9022x 32.98+1-0.9022x 1
= 27.019
cd2 =27.019

2. Coat 1
Similarly,
Effective processing time (te) = 0.3465 min
Utilization = 0.902
Ce2= C02+1+Cr2A(1-A)mrt0
ce 2 =32.98
Cd2=u2Ce2+(1-u2)Ca2
= 0.9022x 32.98+1-0.9022x 27.019
cd2=31.87

3. Coat 2
Similarly,
Effective processing time (te) = 0.3465 min
Utilization = 0.902
Ce2= C02+1+Cr2A(1-A)mrt0
ce2 =32.98
Cd2=u2Ce2+(1-u2)Ca2
= 0.9022x 32.98+1-0.9022x 31.87
cd2=32.77
4. Coating and expose
Since the coating 2 processing rate greater than the arrival rate of the pro- coat system. Arrival rate of the expose machine govern by the arrival rate of pro-coat system Expose machine calculations based on jobs (60 boards = 1 job) Arrival rate =2.604/60

=0.0434 jobs/min
Buffer size = 05
Blocking size = (buffer size + maximum jobs in expose machines)
= 5 + 5
b = 10
ra=0.0434
Ca2=32.77
Coating 2
Expose

= 10

Preemptive outages; Effective processing time (te) = t0A
= 103/0.9677
= 106.43 min
Assumption; Number of boards between setups = 120
Total effective processing time (Preemptive and Non-preemptive outages); (te) = t0A+tsNsx job size
= 1.720.9677+15120x 60
= 114.14 min
Assumption – Standard deviation for repair = 0 min (constant distribution) Preemptive outage variance = σ02A2+(mr2+σr2)(1-A)t0Amr
=672.96772+6002+01-0.9677×1030.9677×600
= 6856.43
Preemptive outage SCV Ce2= C02+1+Cr2A(1-A)mrt0
= 6721032+1+0x0.9677×1-.9677×600103
=0.6052

Assumption- No variation in setups (constant distribution)
Total variance (preemptive + non-preemptive outage) = σ02+σs2Ns+(Ns-1)Ns2ts2
= 6856.43+0+(120-1)1202152
=6858.29
SCV for expose(preemptive + non-preemptive outage) =
=Ce2= σe2te2
= 6858.29114.142
= 0.526
Utilization for expose = raxtem
= 0.0434×114.145
=0.99

Arrival SCV for batch = Arrival SCV for individual part/batch size
= 32.7760
= 0.546
U<1
According to blocking calculations,
WIPnb=(Ca2+Ce2)2u21-u+u
WIPnb=(0.546+0.526)20.9921-.99+0.99
= 53.52
Even though the maximum possible WIP should be 10 in the operation of expose, throughput rate has been calculated bellow as per the 53.52 WIP situations.
ρ=WIPnb-uWIPnb
ρ=53.52-0.9953.52
ρ=0.98
TR= 1-uρb-11-u2ρb-1x ra
TR= 1-0.99×0.9810-11-0.9920.9810-1x 0.0434

TR= 0.0414
Cd2=1+1-u2Ca2-1+u2m(ce2-1)
Cd2=1+1-.9920.546-1+0.9925(0.526-1)
Cd2=0.7832
5. Expose and develop

b = 10
ra=0.0414
Ca2=0.7832
Expose
Develop

Preemptive outages; Effective processing time (te) = t0A
Effective processing time for a batch = (.33/0.99)*60
= 20 min

Ce2= C02+1+Cr2A(1-A)mrt0

= 0+1+0x0.99×1-.99×18019.8
=0.09

As: No variation in repair (constant distribution)

Utilization for develop = raxtem
= 0.0424×201
=0.848
U<1
According to blocking calculations,
WIPnb=(Ca2+Ce2)2u21-u+u
WIPnb=(0.7832+0.09)20.84821-.848+0.848
= 2.914
ρ=WIPnb-uWIPnb
ρ=2.914-0.8482.914

ρ=0.709
TR= 1-uρb-11-u2ρb-1x ra
TR= 1-0.848×0.70910-11-0.84820.70910-1x 0.0414

TR= 0.0412 jobs/min
TR= .0412 x 60
= 2.472 boards/min
SCV dispatch from develop (batch)
Cd2=u2Ce2+(1-u2)Ca2
= 0.8482x 0.09+1-0.8482x 0.7832
= 0.285
Individual SCV = 60 X 0.285
=17.1

6. Develop and inspect

b = 43
ra=2.472
Ca2=17.1

Develop
Inspect

Preemptive outages; Effective processing time (te) = t0A
= (0.5/1)
= 0.5 min

C02=σ02t02
= 0.520.52
= 1
Ce2= C02+1-Cr2A(1-A)mrt0

= 1+0
= 1
Assume two D & I inspectors for inspection operation
Utilization for expose = raxtem
= 2.472×0.52
=0.618
Cd2=1+1-u2Ca2-1+u2m(ce2-1)
Cd2=1+1-0.618217.1-1+0.61822(1-1)

Cd2=10.95

U<1
According to blocking calculations,
WIPnb=(Ca2+Ce2)2u21-u+u
WIPnb=(17.1+1)20.61821-.618+0.618
= 9.66
ρ=WIPnb-uWIPnb
ρ=9.66-0.6189.66

ρ=0.936
TR= 1-uρb-11-u2ρb-1x ra
TR= 1-0.618×0.93643-11-0.61820.93643-1x 2.472

= 2.435 boards/min

7. Bake
Because of nine boards rework, effective processing time of bake will increase. Assumption- once the defects (rework) boards are going through the bake oven all boars are passed at first time.

(te) = t0A
(te) = 0.330.99= 0.333
Effective processing time with rework = te(1+p)
= 0.333(1+0.15) [failure rate in 15%)
= 0.383
Utilization for expose = raxtem
= 2.435×0.3831
=0.932
Preemptive variance
= 90964r rework = =5.455time. time will increase.

in
stem. arrival not bottleneck
σe2=σ02A2+(mr2+σr2)(1-A)t0Amr
σe2=0.992+1802+01-.99x.33.99×180
σe2=0.6
Bake

P

Natural variance change due to rework = σe2(1+p)

= 0.6(1+.15)
= 0.69
Variance due to rework = p x te2(1-p)
= 0.15x.3332(1-.15)
=0.0138
Total variance = 0.69+.0138
= 0.7038
Total SCV, Ce2=σe2te2
Ce2=.7038.3832
Ce2=4.798

Cd2=u2Ce2+(1-u2)Ca2
= 0.9322x 4.798+1-0.9322x 10.95
= 5.606

8. Bake and MI
SCV arrival for MI (individual parts) = 5.606
SCV arrival for MI (Jobs) = 5.606/60 = 0.0934
Arrival rate = 2.435/60 = 0.0405 jobs/min

b = 24
ra=0.0405
Ca2=0.0934

Bake
MI

Preemptive outages; Effective processing time (te) = t0A
= (161/1)
= 161 min
Effective processing time with rework = te(1+p)
= 161(1+0.15) [failure rate in 15%)
= 185.15

C02=σ02t02
C02=64x64161x161
C02=0.158
Ce2= C02+1-Cr2A(1-A)mrt0
= 0.158+0
=0.158

Preemptive variance
= 90964r rework = =5.455time. time will increase.

in
stem. arrival not bottleneck
σe2=σ02A2+(mr2+σr2)(1-A)t0Amr
σe2=409612+0
σe2=4096
Bake

P

Natural variance change due to rework = σe2(1+p)

= 4096 x (1+.15)
= 4710.4
Variance due to rework = p x te2(1-p)
= 0.15×1612(1-.15)
=3304.9
Total variance = 4710.4+3304.9
= 8015.3
Total SCV, Ce2=σe2te2
Ce2=8015.3185.152
Ce2=0.234

Utilization for MI= raxtem
= 0.0405×185.158
=0.937
Cd2=1+1-u2Ca2-1+u2m(ce2-1)
Cd2=1+1-.93720.0934-1+0.93728(0.234-1)

Cd2=0.6516

U<1
According to blocking calculations,
WIPnb=(Ca2+Ce2)2u21-u+u
WIPnb=(0.0934+0.234)20.93721-.937+0.937
= 3.22
ρ=WIPnb-uWIPnb
ρ=3.22-0.9373.32

ρ=0.687
TR= 1-uρb-11-u2ρb-1x ra
TR= 1-0.937×0.68724-11-0.93720.68724-1x 0.0405

TR= 0.0405 jobs/min

9. MI and Touch-up
Note: – According to data mean processing time for touch-up = 9 min
But, repair time for one board = 1 min
So, number of boards for repair = 9
So rejection rate = 9 boards per job
Assumption: – for calculation purposes assume all jobs should go through touch-up workstation. But total time should be match. So assume mean processing time for one job is equal to 0.15 min
SCV arrival for touchup (Jobs) = 0.386
Arrival rate = 0.0405 jobs/min

b = 19
ra=0.0405
Ca2=0.6516
MI
Touchup

Preemptive outages; Effective processing time (te) = t0A
= 9/1
= 9 min

C02=σ02t02
C02=0
Ce2= C02+1-Cr2A(1-A)mrt0
= 0

Utilization for expose = raxtem
= 0.0405×91
=0.3645

Cd2=1+1-u2Ca2-1+u2m(ce2-1)
Cd2=1+1-.364520.2852-1+0.364521(0-1)

Cd2=0.152

U<1
According to blocking calculations,
WIPnb=(Ca2+Ce2)2u21-u+u
WIPnb=(0.2852+0)20.364521-.3645+0.3645
= 0.3943
ρ=WIPnb-uWIPnb
ρ=0.3943-0.36450.3943

ρ=0.0755
TR= 1-uρb-11-u2ρb-1x ra
TR= 1-0.3645×0.075519-11-0.36452X0.076619-1x 0.0405

TR= 0.0405 jobs/min

All the above calculation are summarised in below table.
| Availability(A)| te(min)| U| Ce2| Ca2| m| b| Ra(batch)| TR| WIPnb| Clean| 0.9524| 0.3465| 0.902| 32.98| 1| 1| 0| 0.0434| | | Coat1| 0.9524| 0.3465| 0.902| 32.98| 27.019| 1| 0| 0.0434| | | Coat2| 0.9524| 0.3465| 0.902| 32.98| 31.87| 1| 0| 0.0434| | | Expose(batch)| 0.9677| 114.14| 0.99| 0.526| 0.546| 5| 10| 0.0434| 0.0414| 53.52| Develop| 0.99| 20| 0.848| 0.09| 0.7832| 1| | 0.0414| 0.0412| 2.914| Inspect| 1| 0.5| 0.618| 1| 17.1| 2| 43| 0.0412| 0.0405| 9.66| Bake| 0.99| 0.383| 0.932| 4.798| 0.0934| 1| 0| 0.0405| 0.0405| | MI| 1| 185.15| 0.937| 0.234| 0.0934| 8| 24| 0.0405| 0.0405| | Touchup| 1| 9| 0.3645| 0| 0.2852| 1| 19| 0.0405| 0.0405| 0.3943|

Recommendations
When take the 0.0405 as throughput rate the actual output will be, (0.0405x60x60x19.2), 2,799 boards per day. But to get this output of 2,799, WIP must be need to have 53.52 WIP. It is compulsory to expand the room space to keep those WIP level. But it could be costly exercise. Hence below suggestions can be considered. 1. Increase the working hours from 19.2 by reducing

a. Sift change time 30 to 0 by continuing the worker until next worker start. b. Lunch and break times by moving workers from one operation to cover the bottleneck during breaks and lunch. Working Hours| WIP in
Expose| Through put|

19.2| 53.52| 2,799|
21| 5.5| 2,883|

It is clear that the throughput is increased to 2,883 and the WIP is reduced to 5.5 if the working hours increase as per the above suggestions. 2. Add operators to expose and to Manual operations

There are 5 machines at expose station, but only six operators available which are enough to run only 3 machines. Hence fully staffing the expose machine will be affective increasing the through put.

Same time number of operators must be increased in inspection and MI to continue this situation. Situation| Workers in ShiftsIn expose| Max through put| Incremental cost/ day $| Existing| 6,6,4| 1,509| -|

Improved| 10,10,10| 2,834| 6,720|

Situation| Workers in Shifts| Incremental cost/ day $| | Inspection| MI| |
Existing| 1| 4| -|
Improved| 2| 8| 2,400|

There will be additional cost of $6,720 for increasing the number of workers in expose and for inspection and MI is $ 2,400. But adding this will effect to reduce cost of out sourcing boards by $ 19,875 (1,325×15) 1,325 numbers of boards. Therefore total saving for the company will be $ 10,755 per day. 3. Reduce Setup time

By reducing setup times through put can be increased. If reduce the setup time from 15 min to 5min the throughput will increase to 2,829 from 2,799. It can be done by doing, improve operator training, standardise setup procedures and improving scheduling.

4. Improve operator’s motivation.
As suggested by the consultant team, employees motivation and moral. The motivation programmes must be able to enthusiasm towards the job and company.

Annex 1 – Workings


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